The following account of the related art relates to one of the areas of application of the present disclosure, hearing instruments (also termed hearing aids (HA) in the present application).
Many electronic devices incorporate printed circuit boards (PCB) whereon electronic components are mounted directly onto one or both sides using a Surface Mount Technology (SMT) (as opposed to mounting technologies e.g. involving pins extending through holes in the PCB). Components that are specifically adapted for being surface mounted are typically physically smaller than corresponding components with pins. The use of surface mount components is in general an advantage where relatively small dimensions and a relatively high degree of automation in the mounting process is an advantage. Electronic components adapted for being surface mount are sometimes referred to as SMC (Surface Mount Components) but also as SMD (Surface Mount Device) components. The latter term will be used in the present application. An SMD component has electrical terminals in the form of metallised areas (e.g. in the form of end caps) suitable for being soldered (typically by a machine) directly onto solderable electrically conducting pads (‘footprints’) on the surface of a substrate provided with solder paste for receiving a particular SMD component (the substrate, e.g. a PCB, typically having predefined electrically conducting patterns for interconnecting the various SMD components on the substrate and possibly for connecting the circuitry to external parts). The terminals on an SMD component, in the meaning used in the present application, are generally ‘naked’ (i.e. not protected by any screening arrangement), so the signals they are exposed to or carry may be picked up (by the component itself or by neighbouring components) in an unintended way. In hearing instruments analogue, digital and wireless technology must coexist in very densely packed, battery powered, units, e.g. in the form of a number of closely spaced, possibly electrically connected, different electronic components (including SMD components) assembled on a substrate (possibly on both sides) and housed in the same housing with spatial dimensions of the order of mm's or tens of mm's in a given spatial direction. Electromagnetic coupling between different circuits is thus very likely, especially when high impedance circuits are used. In hearing instruments the impedance level is generally very high in order to save power.
US 2001/0033478 describes a scheme for shielding a printed circuit board (PCB) including a vacuum deposited metal layer for shielding electronic components on a PCB. The metal layer can be disposed on an encapsulating insulating layer and grounded to a ground trace on the PCB.
US 2006/266547 describes a metallic film and a grounding pattern connected to each other so as to achieve electrical shield of an electronic circuit unit. The metallic film is provided on a top surface of a sealing resin portion for burying an electronic component, the side surfaces of the sealing resin portion that are opposite to each other, and the side surfaces of the multi-layered substrate that are opposite to each other. Since the metallic film is formed on the side surfaces of the sealing resin and the side surfaces of the multi-layered substrate, when the metallic film is formed by a plating method, the blind hole may not be provided in the related art.
U.S. Pat. No. 5,639,989 describes electronic components which are shielded from electromagnetic interference (EMI) by one or more conformal layers. Shielding is accomplished through the use of a single general purpose shielding layer, or through a series of shielding layers for protecting more specific EMI frequencies. In a multilayer embodiment, a semiconductor device is mounted on a printed circuit board substrate (16) as a portion of an electronic component assembly. A conformal insulating coating is applied over the device to provide electrical insulation of signal paths (e.g. leads and conductive traces) from subsequently deposited conductive shielding layers. One or more shielding layers are deposited, and are in electrical contact with a ground ring.
U.S. Pat. No. 6,566,596 describes magnetic or electric shielding, or both integrated into the chip packaging materials. A nonconductive primary and tertiary layer sandwich a high-conductivity metal secondary layer forming a Faraday cage for electric field shielding. A nonconductive primary layer is covered by a tertiary layer formed of a composite having permeable material for magnetic shielding. The tertiary layer formed of a composite could include a high permeability particulate ferrous material. Both the secondary layer and the tertiary layer formed of a composite could be used for both electric and magnetic shielding of chips.